Detailed program available, please scroll down

ADTC 2023 is open for registration 



The European Nanoelectronics Applications, Design & Technology Conference will focus on electronic components, electronic system design, design automation, and manufacturing topics related to micro- and nanoelectronics, which are critical to success for many European companies. Exhaustive research and development in this area have been supported by EUREKA, Horizon Europe, and local governments in recent years. This conference will highlight the exciting and promising results primarily from the PENTA/XECS, ECSEL/KDT & H2020/Horizon Europe projects.

This annual event has a clear focus on deep technical discussions between the leading European experts in the addressed fields, independent from the research programs where the individual projects were started. All European projects related to electronic system design, to design technology and to manufacturing topics are invited to contribute to the conference. 

The 100 expected attendees will include project managers and leading experts in R&D projects in the fields of nanoelectronics and design technologies and their applications, semiconductor-industry R&D managers, microelectronics experts in applications industries like automotive and industrial, and the major research organizations in the European scientific community.


This year,  ADTC takes place in the Y-SPOT Building, 5, Place Nelson Mandela, Grenoble,  in "Attique" room. For more information, please sroll down.


ADTC is organized as collaboration event for experts in the field. All attendees benefit from the intensive information exchange and share the cost, which will be kept low. It is a nonprofit event, the local organisers do not get any compensation for their work. Most attendees contribute actively to the event, e.g. as speaker or panelist, therefore free participation is not possible.

This year, ADTC is a side event of the Leti Innovation Days 


All ADTC attendees will have a discount rate to the Leti Innovation Days registration fee. 

Please see the ADTC registration page for more information


Monday, June 26, 2023 

13:30 – 13:45   Welcome & Opening Session

13:45 – 14:30   Keynote on Chip Act
ChairM. Coppola (STMicroelectronic, Grenoble, F)

     “Empowering Europe's digital resilience: unleashing the potential of the EU Chips Ac​t"
           V. Renda (Associate Director for Digital Transformation Policy, DIGITALEUROPE, Brussels, B)

14:30 – 15:45 Technical Session 1: Green Electronics
Chair: A. Castillejo (STMicroelectronic, Grenoble, F)  

     “A digital product passport for sustainable and circular electronic products"     
          C. Bernier (CEA List, Grenoble, F)
     "Pathfinding Sustainable Electronics" 
          P. Nussbaum (CSEM, Neuchatel, CH)
     " Sustainable Technologies to address electronics circularity challenges" 
          P. Roquet (STMicroelectronic, Grenoble, F)

15:45 – 16:15   Break

16:15 – 17:30 Technical Session 2: RISC-V 
Chair: C. Fabre (CEA-List, Grenoble, F)

     "Design and Exploration of RISC-V Cores from High-Level Specifications" 
          O. Sentieys (Univ. Rennes, INRIA, Lannion, F)
     " A view on RISC-V research from dependable operating systems"
          H. Blasum (Sysgo, Klein-Winternheim, D)
      " VPSim Virtual Prototyping Simulator tool for High Performance Computing platforms co-design"
            M. Benazouz, A. Mouhagir, L. Zaourar (CEA List, Saclay, F)

17:30 – 18:30   Technical Session 3: The role of AI on the EDA  
Chair: M. Coppola (STMicroelectronic, Grenoble, F)

      " Automating Chip Design with AI "
            T. Bjerregaard (Synopsys, Copenhague, DK)

20:00 – 23:00   Gala Dinner
Tuesday, June 27, 2023 
08:30 – 09.00   Keynote 
ChairG. Sicard (CEA Leti, Grenoble, F)

     "Edge AI: Basics & Trends"
          M. Diaz Nava (STMicroelectronics, Grenoble, F), O. Vermesan (Sintef, NL)

09:00 – 09:45   Break with Leti Day's

09:45 – 11:45 Technical Session 4: Edge AI
Chairs: M. Diaz Nava (STMicrolectronics, Grenoble F)
           Y. Le Tiec (CEA Leti, Grenoble, F)

     " ANDANTE : AI for New Devices And Technologies at the Edge"
          M. Diaz Nava (STMicroelectronic, Grenoble, F)
     " Resistive memory-based concepts for Edge AI"
          E. Vianello (CEA Leti, Grenoble, F)
     " Merging insights from artificial and biological neural networks for neuromorphic edge intelligence"
          C. Frenkel (TU Delft, Delft, NL)
     " NeuroCorgi: preparing the path for a low-energy and low-latency AI architecture"
          I. Miro-Panades, I. Kucher, V. Lorrain, A. Valentian (CEA List, Grenoble, F)
     " Enabling Edge AI Computer Vision in mW range with scalable IPs platform"
          V. Huard (Dolphin, Grenoble, F)
     " Independent tool platform for embedded deep learning"
          V. Templier, P. Gaillard, O. Bichler, C. Moineau, I. Kucher, V. Lorrain, T. Allenet, M. Naud, M. Guibert (CEA List, Saclay, F)
     " Toolchain for Mixed-Signal Inference Accelerators with In-Memory Computing"
          M. Mallah (Fraunhoffer, D)

11:45 – 13:45   Lunch Break with Leti Day's

13:45 – 14:30   Keynote on Edge AI
Chair: O. Vermesan (Sintef, NL)

     "Pathways to Human-centred AI-driven Modular Innovation in Electronic System Design"
          H. Espinoza (Program Officer, KDT JU, Brussels, B)

14:30 – 15:45 Technical Session 5: Automotive
Chair: M. Coppola (STMicroelectronic, Grenoble, F)

     " Perspective on the use of Tiny ML boards for partitioned Electrical Electronic architectures in mobility"
          P. Perlo (I-FEVS, I)
     " Explainable Deep Learning for Automotive Applications: A Systematic Review"
          C. Pino (STMicrolectronics, I)
     SOI Technology for the automotive environment: Car interior and exterior sensing"
          L. Govoni (AED Vantage GmbH, DE)

15:45 – 17:00 Technical Session 6: Connectivity
Chair: B. Candaele (THALES, F)

     " A novel extensible NoC for the Chiplet Age"
          M. Nuessle (EXTOLL GmbH, D)
     " Transition to next generation of heterogeneous power RF Front End based on Fan-Out WLP"
          D. Floriot (UMS, F)
     " Developing 5G NTN"
          B. Candaele (THALES, F)

17:00 – 17:05   Closing Session

17:05 – 18:00   Break with Leti Day's

Conference Co-chairs: Marcello Coppola (STMicroelectronics), Gilles Sicard (CEA leti).




  •        - Martin Barnasconi, NXP, NL
  •        - Bernard Candaele, Thales Group, F
  •        - Patrick Cogez, AENEAS, F
  •        - Marcello Coppola, STMicroelectronics, F
  •        - Mario Diaz-Nava, STMicroelectronics, F
  •        - Manfred Dietrich, Dikuli, D
  •        - Thomas Fleischmann Bosch, D
  •        - Yves Gigase, ECSEL, B
  •        - Jürgen Haase, edacentrum, D
  •        - Jiri Kadlec, UTIA, CZ
    •        - Yannick Le Tiec, CEA-leti, F
  •        - Enrico Macii, Polito, I
  •        - Cosimo Musca, STMicroelectronics, I
  •        - Franck Oppenheimer, Offis D
  •        - Frederic Petrot TIMA, F
  •        - Patrick Pype, NXP, NL
  •        - Frank Schenkel MunEDA, D
  •        - Holger Schmidt, Infineon, D
  •        - Ulf Schlichtmann edacentrum, D
    •        - Peter Schneider, FHG, D
  •        - Gilles Sicard , CEA-leti, F
  •        - Anne Vandenbosch, IMEC B
  •        - Ovidiu Vermesan, Sintef, N
  •        - Eugenio Villar, U. Cantabria, E
    •        - Pascal Vivet, CEA-list, F