FOCUS
The European Nanoelectronics Applications, Design & Technology Conference focus on electronic components, electronic system design, design automation, and manufacturing topics related to micro- and nanoelectronics, which are critical to success for many European companies. Exhaustive research and development in this area have been supported by EUREKA, Horizon Europe, and local governments in recent years. This conference will highlight the exciting and promising results primarily from the PENTA/XECS, ECSEL/KDT/Chips JU & H2020/HE and IPCEI ME/CT projects.
This annual event has a clear focus on deep technical discussions between the leading European experts in the addressed fields, independent from the research programs where the individual projects were started. All European projects related to electronic system design, to design technology and to manufacturing topics are invited to contribute to the conference.
The 100 expected attendees will include project managers and leading experts in R&D projects in the fields of nanoelectronics, design technologies and their applications, semiconductor-industry R&D managers, microelectronics experts in applications industries like automotive and industrial, and the major research organizations in the European scientific community.
FINANCIAL CONCEPT
ADTC is organized as collaboration event for experts in the field. All attendees benefit from the intensive information exchange and share the cost, which will be kept low. It is a nonprofit event, the local organisers do not get any compensation for their work. Most attendees contribute actively to the event, e.g. as speaker or panelist, therefore free participation is not possible.
CONFERENCE LOCATION
The event takes place at the MINATEC Conference Center:
MINATEC
3 parvis Louis Néel,
38054 Grenoble
PROGRAM
Wednesday, May 14, 2025
12:30 – 13:25 Registration
13:25 – 13:30 Welcome & Opening Session
13:30 – 14:15 Opening Keynote
“Quantum computing technology platforms and their maturity level"
S. Luber (Infineon, Germany)
14:15 – 15:45 Technical Session 1: Photonics Chips in Europe
Chair: V. Pruneri (ICFO - PixEurope Coordinator, Spain)
“PIXEurope: Advanced Photonic Integrated Circuits Pilot Line for Europe”,
V. Pruneri (ICFO - PixEurope Coordinator, Spain)
“JePPIX: Design and production of InP PICs with open-access design kits”,
K. Williams (TU/e, The Netherlands)
“PIXAPP: Open Access PIC Packaging”,
P. Morrissey (Tyndall, Ireland)
“Silicon Photonics for Neuromorphic Computing”,
B. Charbonnier (CEA Leti, France)
16:15 – 17:45 Technical Session 2: Chiplet
Chair: P. Vivet (CEA-Leti, France)
“Automotive Chiplet Systems - Open Ecosystem challenges and opportunities”,
T Schamm/ J-O Godbersen (BOSCH, Germany)
“Innovating Space Electronics through Chiplet-Based Designs”,
D. Dutoit (CEA List, France)
“Siemens EDA AI: Providing High Value AI Approaches Across Chiplet Workflows”,
H. Dudek (Siemens-EDA, Germany)
17:45 – 18:30 Poster pitchs
Thursday, May 15, 2025
08:00 – 08:30 Registration
08:30 – 09:15 Keynote
“FAMES Pilot Line Project”,
G. Cibrario (CEA Leti, France)
09:15 – 10:30 Technical Session 3: Power Electronics
Chair: S. Lesecq (CEA Leti, France)
“Future Power Drive Systems Roadmap”,
D. Brauer (Valeo eAutomotive Germany GmbH, Germany)
“From Device to System (and vice-versa) – system technology co-optimization for power electronic”,
R. Gwoziecki (CEA Leti, France)
“Evaluating the reliability of highly demanding Power Electronic for electrical mobility : key findings from the Archimedes Chips JU Project and other collaborative projects”,
M.
Labalette (IRT St Exupéry – France)
11:00 – 12:30 Poster Session highlithing Minalogic SMEs members and IPCEI demos and projects
13:30 – 15:00 Technical Session 4: Spintronic & Quantum Sensing and Communication
Chair: O. Vermesan (SINTEF, The Netherlands), P. Cogez (AENEAS, France)
“TBD”,
P. Bortolotti (Thales, France)
“TBD”,
N. Fabbri (CNR INO – LENS, Italy)
15:00 – 16:30 Special Session: IPCEI Highlights
Chair: C. Musca (STMicroelectronics, Italy)
17:00 – 18:00 Panel on IPCEI as strategic instrument to boost Europe’s semiconductor industry
Chair: P. Pype (NXP Semiconductors, Belgium)
Panellist:
Ferdinand Bell (NXP Semiconductors, Germany),
Ben Ruck (Ministry of Economic Affairs, The Netherlands),
Sophie Cordeiro (Bosch, Germany)
Dominique Thomas (STMicroelectronics, France)
20:00 – 23:00 Gala Dinner
Friday, May 16, 2025
08:00 – 08:30 Registration
08:30 – 10:00 Technical Session 5: CAD Tools based on AI Chair: C. Andriamisaina (CEA List, France)
"Leveraging Large Language Models for Assissted Design Documentation Generation",
R. Kunzelmann (Infineon, Germany)
"LLM-Aided Efficient Hardware Design Automation",
U. Schlichtmann (TUM, Germany)
"TBD",
P. Urard (STMicroelectronics, France)
"AI-Driven Performance Modeling for Fast and Accurate High-Level Simulation",
C. Andriamisaina (CEA List, France)
10:30 – 11:45 Technical Session 6: Sustainability
Chairs: A. Castillejo (STMicroelectronics, France)
"DESIRE4EU Horizon Europe project, DESIgning and REcycling sustainable Electronic boards for a EUropean circular economy",
N. H. Nguyen (CROMA Lab., France)
"Circular economy on electronic components scrap - Reuse versus recycling",
N. Canis-Moal (Continental Automotive, France)
"Noise-Optimized Neuromorphic Spiking Radio in Context-Aware IoT",
P. M. Ferreira (CROMA Lab., France)
11:45 – 13:15 Technical Session 7: Software Defined Vehicle
Chairs: H. Schmidt (Infineon, Germany)
"FEDERATE: Building an European open-source community for collaborative and accelerated SDV development",
B. Wilsch (VDI/VDE-IT), Germany)
"Contributions from Horizon Europe funded initiatives CODE4EV and TWIN-LOOP for the Software-Defined Vehicle of the Future initiative", E. Armengaud (Armengaud Innovate GmbH, Austria)
"Trade-off exploration for an efficient modular build system",
T. Peyret (NXP, France)
"HAL4SDV: Hardware Abstraction Layer for a European Software Defined Vehicle Approach",
A. Eckel (TTTech Computertechnik AG, Austria)
13:15 – 13:20 Closing Session
13:20 – 14:00 Lunch